#chisel

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Medium
1 month ago
Scala

Improved pipeline processing of self-made virtual CPU Part 2

Executing one operation over multiple cycles is essential for simulating actual circuit behavior in Chisel.
Key steps include specifying cycles to complete, starting execution under specific conditions, and managing command flow between stages. [ more ]
Medium
2 months ago
Scala

Improved pipeline processing for self-made CPU

Separate classes created for ID and EX stages in pipeline processing
Commands now distributed to appropriate arithmetic units based on their type to improve efficiency [ more ]
Medium
3 months ago
Scala

Implemented M-extension of RISCV

Implementation of RISC-V instruction set extensions like M extension involves adding instruction set, decoding process, calculation process, and write-back process.
Multiplication and Division operations in Chisel can be implemented by creating independent modules for each operation and paying attention to bit width and error handling. [ more ]
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